The invention relates generally to GaAs semiconductor devices and it relates, in particular, to a method of making n-type surface regions on GaAs.
Semiconductor devices made of GaAs show much promise for superior performance and the technology for GaAs has been advanced to the point where microwave and digital devices have become commercially available. Ion implantation into GaAs has become the preferred method for doping this material. However, the fabrication of n-type regions in GaAs has always presented difficulties. The conventional method of fabricating ion implanted n-type regions for FET GaAs devices is to implant doping atoms of silicon or selenium into semi-insulating GaAs substrates. The implanted substrate is then annealed at elevated temperature to remove the radiation damage caused by the energetic ions during implantation. This annealing moves the implanted doping atoms into substitution lattice sites to electrically activate the GaAs. Since the implanted doping atoms are embedded in the host substrate, the electrical properties of the implanted region are dependent upon the quality of the substrate in terms of residual impurities, lattice defects and stoichiometry. The disadvantage of this method is the absence of control in producing predictable electrical properties of an n-type implanted layer on semi-insulating GaAs. At the present time, it is required that substrates by pre-selected based on positive results on substrates from a given ingot of GaAs. This procedure is called ingot qualification. Using this procedure, most manufacturers of semi-insulating GaAs substrates measure resistivity and carrier mobility as part of qualifying substrates for direct ion implantation. However, these measurements are subject to error in interpretation and do not necessarily guarantee successful ion implantation results. Furthermore, only a fraction of the GaAs ingots pass the test so that the yield is correspondingly lowered.
An alternative procedure is to epitaxially grow a high resistivity buffer layer on top of a semi-insulating GaAs substrate and then to implant an active region into the buffer layer. This approach reduces the influence of the substrate and thus has the potential for increasing the yield. It relies on the fact that the implanted ions are embedded in higher quality epitaxial GaAs. However, this approach increases the complexity of the substrate fabrication process and produces an additional uncertainty for the quality of the material in which the ion implantation occurs. Because buffer layer epitaxial material is of a lower resistivity than semi-insulating bulk material, potential isolation problems may occur between devices on the same epitaxial layer when planar fabrication is used. In addition, the semi-insulating bulk substrate continues to influence the quality of the epitaxial buffer layer.
It is believed that the fundamental problem with ion implanting bulk GaAs arises during the implant anneal. The ion implantation produces a disordered surface region that is either amorphous or at least consists of regions of amorphous material. In the anneal following the implantation, the disordered region epitaxially recrystallizes on the undisturbed substrate. However, because of the necessarily high temperatures involved, impurities, vacancies and other defects from both the surface layer as well as the substrate tend to be swept toward the surface, the region which will become electrically active. Thus the quality of the GaAs substrate is critical to the electrical properties of the implanted GaAs surface. Furthermore, the high annealing temperatures cause the distribution of implanted dopant atoms to broaden. The low value of the gradient of this distribution appears to be strongly dependent upon the quality of the substrate.